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Please use this identifier to cite or link to this item: http://ntour.ntou.edu.tw:8080/ir/handle/987654321/51709

Title: Investigation of Field-Plate Gate on Heterojunction Doped-Channel Field Effect Transistors
Authors: Meng-Kai Hsu
Shao-Yen Chiu
Chung-Hsien Wu
Kang-Ping Liu
Jung-Hui Tsai
Wen-Shiung Lour
Contributors: 國立臺灣海洋大學電機工程學系
Date: 2008
Issue Date: 2018-12-21T01:15:50Z
Publisher: IEEE Electron Device Lett
Abstract: Abstract: In this work, we report a metal-splitting field plate gate on heterojunction doped-channel field effect transistors (HDCFETs) with an application of GaAs-bulk. Experimentally, a HDCFET with a gate-metal length of 0.4 mum, a field-plate length of 0.6 mum, and a bulk thickness of 120 nm was successfully fabricated for comparing to that with a 1-mum traditional planar-gate. The current density (451 mA/mm), transconductance (225 mS/mm), breakdown voltages (VBD(DS)/VBD(GD)=22/-25.5 V), gate-voltage swing (2.24 V), unity current-gain and power-gain frequencies (ft/fmax=17.2/32 GHz) are improved as compared to those of 1-mum gate device without field plates. At 1.8 GHz with a VDS of 4.0 V operation, a maximum power-added efficiency (PAE) of 36% with an output power of 13.9 dBm and a power gain of 8.7 dB was obtained. Saturated output power and linear power gain are 316 mW/mm and 13 dB, respectively.
URI: http://ntour.ntou.edu.tw:8080/ir/handle/987654321/51709
Appears in Collections:[電機工程學系] 期刊論文

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