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Please use this identifier to cite or link to this item: http://ntour.ntou.edu.tw:8080/ir/handle/987654321/49796

Title: 具智能控制之高效率雙模直流對直流升壓穩壓器設計
Design of a High Efficiency Dual-Mode DC-DC Boost Converter with Smart Switch Control
Authors: Wang, Kun-Tang
王琨堂
Contributors: NTOU:Department of Electrical Engineering
國立臺灣海洋大學:電機工程學系
Keywords: 脈衝寬度調變模式;升壓穩壓器;脈衝頻率調變模式;電壓模式
Pulse Width Modulation;Boost Converter;Pulse Frequency Modulation;Voltage Mode
Date: 2017
Issue Date: 2018-08-22T07:11:52Z
Abstract: 近年來科技產業發展快速,智慧型手機已經成為我們生活中不可或缺的一部份,其功能不只侷限於通話,還包含了拍照、遊戲、上網等等功能,功能愈來愈多樣性,一顆電池必須提供智慧型手機中各模組的電力,因此為了讓電池發揮最大效能我們需要一個強大並且穩定的電源管理系統。 本論文為設計一雙模式控制升壓穩壓器,使用電壓模式、脈衝寬度調變模式、脈衝頻率調變模式組成。在重載時使用脈衝寬度調變模式,其模式在重載時有良好的轉換效率,然而脈衝寬度調變模式的切換損失皆為固定值,工作於輕載時的轉換效率表現不佳;因此在輕載時我們採用脈衝頻率調變模式,降低切換損失提高輕載時的效率。由於不同尺寸功率電晶體工作於各負載的轉換效率皆不相同,為了提高整體效率表現,本設計將功率電晶體分為A、B、C三組,以負載電流大小來決定功率電晶體所開的區塊,來維持整體電路之效能轉換。 本論文設計使用國家晶片系統設計中心(CIC) 所提供的TSMC 0.35um Mixed-Signal 2P4M Polycide 的製程技術,輸入電壓範圍在3 V~3.9 V,輸出電壓為5 V,操作在1.1 MHz,使用電感10 uH,負載電容10 uF,電壓漣波於脈衝寬度調變模式約為20 mV,脈衝頻率調變模式約為30 mV,該升壓穩壓器之負載範圍為25 mA~400 mA,在50 mA操作於脈衝頻率調變模式效率為88.3%,最高效率為300 mA時的93.5%,晶片面積為2.149×1.978 mm2。
In recent year, the technology industry has developed rapidly, smart phones have become an indispensable part of our lives. The mobile phone functions are not limited to call, but also include the camera, play games, internet, etc., the functions are more and more diversity. A battery needs to supply power to many different modules in the smart phone, so we need strong and stable power management systems to maximize the performance of the battery. In this thesis, a dual-mode boost converter is designed with voltage mode, pulse width modulation, and pulse frequency modulation. When the current is at heavy loads, the converter operates in pulse width modulation which has high conversion efficiency. However, the switching loss of the pulse width modulation mode is a fixed value, and the conversion efficiency at light loads is not well. So when the current is at light loads, the converter operates in pulse frequency modulation, reducing the switching losses to improve efficiency at light loads. Because different sizes of power transistors work in each load have different conversion efficiency, in order to achieve the highest efficiency, we divide the power MOSFET into A, B, and C three parts and by sensing the load current to open the corresponding parts and maintain the conversion efficiency of the whole circuit. This thesis is implemented with TSMC 0.35um Mixed-Signal 2P4M Polycide process provided by National Chip Implementation Center. The range of the input voltage is from 3 V to 3.9 V and the output voltage of the converter is steady in 5 V. The converter operates at switching frequency 1.1 MHz, the inductor is 10 uH, and the capacitor is 10 uF. The output ripple voltage of the system operating in the pulse width modulation mode is 20 mV. While operating in the pulse frequency modulation mode, the output ripple voltage is 30 mV. The load current range is 25 mA to 400 mA. When the load current is 50 mA, the conversion efficiency is 88.3% at pulse frequency modulation mode. The maximum conversion efficiency is 93.5%, and the area of the chip is 2.149×1.978 mm2.
URI: http://ethesys.lib.ntou.edu.tw/cgi-bin/gs32/gsweb.cgi?o=dstdcdr&s=G0010353007.id
http://ntour.ntou.edu.tw:8080/ir/handle/987654321/49796
Appears in Collections:[電機工程學系] 博碩士論文

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