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Please use this identifier to cite or link to this item: http://ntour.ntou.edu.tw:8080/ir/handle/987654321/49793

Title: 應用於可攜式產品之高效率雙模式降壓轉換器設計
Design of a Dual-Mode High-Efficiency Buck Converter for Portable Applications
Authors: Hong, Zi-Chian
洪子騫
Contributors: NTOU:Department of Electrical Engineering
國立臺灣海洋大學:電機工程學系
Keywords: 降壓轉換器;脈衝寬度調變;脈衝省略調變;轉換效率
Buck converter;PSM;PWM;Conversion efficiency
Date: 2017
Issue Date: 2018-08-22T07:11:47Z
Abstract: 近年來可攜式電子產品市場快速成長,產品功能趨向多元化,對於電源的有效利用更為重要,因此電源管理模組的微型化與轉換效率成為首要考量,影響電源管理模組大小的關鍵在於外接儲能電感與輸出電容的大小,因此我們提高切換頻率以縮小電感、電容尺寸,達到微型化的目的,但操作於高切換頻率時,輕負載的轉換效率並不理想,為了提高輕負載的效率,本論文使用雙調變模式架構與智慧切換控制兩種解決方式。 本論文提出一高切換頻率,並於寬負載範圍均有高轉換效率之雙模式降壓轉換器,以電流模式設計,並使用脈衝寬度調變模式(PWM)及脈衝省略調變模式(PSM)實現。為了降低輕載時的切換損失,在輕載時使用脈衝省略調變,重載時使用脈衝寬度調變,並將功率電晶體分為三組,依照負載電流大小,開啟相對應的功率電晶體。本設計分為四個負載範圍,將切換損失最佳化,以提高轉換效率。 本論文以TSMC 0.35um 2P4M 3.3/5V mixed-signal CMOS製程設計與實現, 輸入電壓範圍在3V ~ 4.2V,輸出電壓為1.8V,操作頻率在10MHz,負載電流範圍為50mA ~ 500mA,轉換效率最高可達86.66%。使用電感值0.5uH,負載電容值10uF,有效縮小外接被動元件尺寸,適合應用於可攜式產品。
In recent years, the portable electronic devices market is flourishing quickly and product features tend to be diversification. The miniaturization of power management modules and improvement of conversion efficiency become the primary consideration. The major impact of the power management module size is the size of the external inductor and output capacitor. In order to achieve the purpose of miniaturization, we increase the switching frequency to reduce inductance and capacitance sizes. However, the conversion efficiency at light loads is not well when operating at high switching frequency. Therefore, this thesis presents dual-mode and smart switching control to improve efficiency at light loads. In this thesis, we use current mode, pulse width modulation (PWM) and pulse skipping modulation (PSM) to achieve a high conversion efficiency and high switching frequency dual-mode buck converter with a wide load range. In order to reduce the switching losses at light loads, the converter operates in pulse skipping modulation during light loads, and when at heavy load, the converter operates in pulse width modulation. Moreover, the power transistors are divided into three groups, and according to the load current to open the relative power transistors. This design consists of four load ranges, and optimizes the switching loss to improve the conversion efficiency. This thesis has been designed and implemented with TSMC 0.35um 2P4M 3.3/5V mixed-signal CMOS process. With input voltage ranging from 3.0 to 4.2 V, the output voltage is 1.8V. The operating frequency is 10MHz. The load current range can be 50mA ~ 500mA. The maximum conversion efficiency is 86.66%. The size of inductor is 0.5uH and the value of capacitor is 10uF. This can effectively reduce external passive component sizes, and is suitable for portable product applications.
URI: http://ethesys.lib.ntou.edu.tw/cgi-bin/gs32/gsweb.cgi?o=dstdcdr&s=G0010353003.id
http://ntour.ntou.edu.tw:8080/ir/handle/987654321/49793
Appears in Collections:[電機工程學系] 博碩士論文

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