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Please use this identifier to cite or link to this item: http://ntour.ntou.edu.tw:8080/ir/handle/987654321/28456

Title: Design and Implementation of a Low-Voltage 2.4-GHz CMOS RF Receiver Front-End for Wireless Communication
Authors: Wan-Rone Liou;Mei-Ling Yeh;Chun-An Tsai;Shun-Hsyung Chang
Contributors: NTOU:Department of Electrical Engineering
國立臺灣海洋大學:電機工程學系
Keywords: receiver;low-voltage;radio-frequency;band pass filter
Date: 2005
Issue Date: 2011-10-21T02:37:38Z
Publisher: Journal of Marine Science and Technology
Abstract: abstract:This paper presents the design of a 1.5 V CMOS RF receiver front-end system which contains a low noise amplifier (LNA) with band pass filter and a down conversion mixer. An inter-stage matching network is added between the common-source and common-gate transistors in the LNA's first satge to further lower the noise and enhance the overall gain. An inductor is used in this inter-stage matching network because of the extra capacitive of MOSFETs in the LNA.The maximum gain achieved of this LNA is 15dB. The single square-law structure was implemented for this low power consumption and high linearity mixer. From the measured results, the whole receiver provides a conversion gain of 8.5 dB at 2.4GHz with LO power input -3.5dBm. The power dissipation of this front-end is 9 mW.
Relation: 13(3), pp.170-175
URI: http://ntour.ntou.edu.tw/handle/987654321/28456
Appears in Collections:[電機工程學系] 期刊論文

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