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Please use this identifier to cite or link to this item: http://ntour.ntou.edu.tw:8080/ir/handle/987654321/28209

Title: Outlier Resistance Estimator for GPS Positioning
Authors: Dah-Jing Jwo;Shun-Jie Chang;Member;IEEE
Contributors: NTOU:Department of Communications Navigation and Control Engineering
國立臺灣海洋大學:通訊與導航工程學系
Date: 2006-10-06
Issue Date: 2011-10-21T02:36:14Z
Publisher: 2006 IEEE International Conference on
Systems, Man, and Cybernetics
Abstract: abstract:This paper discusses the implementation aspects of LI and Loo criteria, and their outlier resistance performance for GPS positioning. Three ordinary differential equation formulation schemes and corresponding circuits of neuron-like analogue Li (least-absolute), Loo (minimax), and L2 (least-squares) processors will be employed for GPS navigation processing. The circuits of simple neuron-like analogue processors are employed essentially for solving systems of linear equations. Experiments on single epoch and thereafter kinematic positioning will be conducted by computer simulation for investigating the outlier resistance performance for the least-absolute and minimax schemes as compared to the one provided by the least-squares scheme.
Relation: 1, pp.257-662
URI: http://ntour.ntou.edu.tw/handle/987654321/28209
Appears in Collections:[通訊與導航工程學系] 演講及研討會

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