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Please use this identifier to cite or link to this item: http://ntour.ntou.edu.tw:8080/ir/handle/987654321/11269

Title: 基於FPGA之高解析度PET/SPECT訊號擷取系統設計
FPGA based high resolution PET/SPECT data acquisition system
Authors: 吳宗達
Contributors: NTOU:Department of Electrical Engineering
國立臺灣海洋大學:電機工程學系
Keywords: 定比鑑別器;數位信號處理;正子斷層掃描
Constant Fraction Discriminator;Digital Signal Processing;Positron Emission Tomography
Date: 2010
Issue Date: 2011-06-28T08:08:52Z
Abstract: 近幾年來PET與SPECT的系統逐漸走向數位式PET/SPECT (digital PET/SPECT),前端探頭的設計逐漸由數位化取代掉傳統之類比電路,盡量減少在類比電子端之電子電路,將傳統的功能都移到轉換後的數位電路端來。例如位置(position)資訊、能量(energy)資訊、以及時間(timing)資訊,以往都是在類比電子電路上計算出來,而現在都希望轉移到數位電路來。要做到如此的效果,高速且自由取樣(free sampling)的類比數位轉換技術,以及處理大量數位信號的數位信號處理技術變得相當重要。 本計畫將針對核研所目前所發展的PET/SPECT系統,設計類似於LabPET™架構的數位化信號處理系統。計劃將以 FPGA 技術開發設計適用於高解析度PET/SPECT 之資料擷取與數位信號處理系統。電路的重點將放在時間資訊的取得,以FPGA實現數位式CFD電路。數位信號處理採用 sub-clock rate pulse timing 技術設計專屬的脈波處理電路,發展快速且有效率的演算法以得到最佳的訊號擷取品質。並以脈波處理電路控制脈波時間的精準擷取以及延遲,提高數位邏輯電路之觸發時間解析度及整體系統之事件處理速度。此外本計劃中亦將設計數位式Gamma事件位置與能量計算電路,並且以FPGA實現所需要之數位邏輯。而在資料輸出處理電路方面,為了降低系統的dead-time,在輸出的時序處理必須相當謹慎。本計劃將使用非同步先入先出(First In First Out, FIFO)的佇列(Queue),對於兩個不同FPGA與數位輸出入卡的同步性質特別處理,使得介面能夠順利整合。
In recent year, the PET and SPECT system has been gradually toward to all digital PET/SPECT system, where the design of the front-end detector module has been digitalized instead of the traditional analog electronic design. The analog parts of the front-end electronics have been remove more and more, and the functions of the PET/SPECT have been move to the digital signal processing boards, for examples, position information, energy information, and timing information. They used to be calculated in the analog electronic circuits and now are transfer to digital electronic circuits. To approach the goal of digitalization, high speed and free running sampling techniques of the analog to digital converter and the digital signal processing techniques for dealing huge amount of data have been very important. In this project, we will design a digital signal processing and acquisition system, analog to the structure of the famous LabPET™, suited for the PET/SPECT system developed in the INER. We will use the advanced FPGA technology to develop a data acquisition and DSP system used in high resolution PET/SPECT system. The key work will be the acquiring of the timing information by digital CFD circuits using FPGA. Sub-clock rate pulse timing technique will be used in the DSP circuit for pulse processing electronics. The pulse timing and delay will be handled accurately in order to improve the timing resolution and raise the event rate. In this project, we will also design the digital position/energy information calculation circuits by FPGA for gamma event. In the data input module, a low-dead time circuits with asynchronous FIFO/Queue will be developed for the interface between the digital IO card and FPGA.
URI: http://ntour.ntou.edu.tw/ir/handle/987654321/11269
Appears in Collections:[電機工程學系] 研究計畫

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